Not applicable
This invention relates to a slurry and method for chemical-mechanical polishing of a copper or silver containing film.
Reductions in semiconductor device dimensions provide higher densities and improved performance for integrated circuits. In many integrated electronic devices, millions of discrete elements, such as transistors, resistors and capacitors, are interconnected. Due to an increase in device density provided by scaling of semiconductor processes to improve circuit performance, it is no longer generally possible to utilize a single metal interconnect level. Single level interconnects result in significant parasitic resistance which can adversely affect device performance, particularly the dynamic performance of the integrated circuit.
Copper has become an increasingly popular choice for interconnect metal and has begun replacing aluminum in certain applications. Copper is much more conductive than aluminum, allowing finer wires having lower resistive losses. Copper is also significantly less vulnerable to electromigration than aluminum and less likely to fracture under stress. Electromigration is the drift of metal atoms when a conductor carries high current densities, and can create reliability problems through generation of voids and other defects.
Although, copper provides advantages over aluminum, it has at least one major disadvantage. Copper is poisonous to silicon since it readily diffuses into silicon and causes deep-level defects. Therefore, copper must be isolated from silicon, usually through use of a suitable barrier layer.
Multilevel metallization structures have been developed which include an interconnection structure having several levels of metallization separated by thin insulating layers. Metal plugs are used to connect the different metal levels to one another. Presently, aluminum alloys (e.g. Al/Si/Cu) are still commonly used for the metal interconnect, while tungsten is generally used for plug structures as the material of choice for interconnecting two levels of metals. Aluminum and its alloys are generally dry etched, such as reactive ion etching and plasma etching. However, dry etching of copper is not currently feasible. Accordingly, when copper and its alloys are used instead of conventional aluminum or aluminum alloys as an interconnection material, alternative techniques are employed to define the copper lines.
For example, a damascene process together with chemical-mechanical polishing (CPM) can be used to define copper lines. In a damascene process, trenches are etched in a dielectric material, such as silicon dioxide (SiO2). A barrier material is then deposited, generally by sputtering. Copper is then deposited typically using electrodeposition techniques (e.g. electroplating) to fill the barrier lined trenches. In the case of electrodeposition of copper onto a silicon wafer, the wafer is typically coated with a thin conductive layer of copper (seed layer) to produce electrically conductive surfaces before being immersed in a solution containing cupric ions. The copper seed layer is preferably extremely thin, but must still be continuous across all features on the wafer surface to maximize deposition of copper on via sidewalls while minimizing the layer thickness on the bottom of the features and on the field of the wafer. The copper film is then removed by CMP to define the copper lines.
CMP combines both chemical action and mechanical forces and is commonly used to remove metal deposits in damascene processes, remove excess oxide in shallow trench isolation steps, and to reduce topography across a dielectric region. Components required for CMP include a chemically reactive liquid medium and a polishing surface to provide the mechanical control required to achieve planarity. Either the liquid or the polishing surface may contain nano-size inorganic particles to enhance the reactive and mechanical activity of the process. CMP is the only technique currently known for producing die level flatness required for sub 0.5 xcexcm devices and is considered a requirement for the production of sub 0.2 xcexcm device structures and state-of-the-art metal interconnect schemes.
Metals can also be used to form the gate electrode of certain devices. In this case, the metal gate provides the electrical pathway for switching the device. In the case of a MOS transistor, the gate dielectric is typically silicon dioxide while the typical gate electrodes presently used are formed from heavily doped polysilicon. Alternative gate dielectrics having improved properties may soon replace SiO2. For example, novel high dielectric constant materials such as yttria stabilized zirconia (YSZ), hafnia, lanthanum oxide, and certain silicates are expected to find increasing use for future high performance applications. To use these gate dielectrics more efficiently, gate electrode materials such as Ta, Cu, and Pt may also become used.
Other possible metallic materials may include Os, Ru, TiN, TaSiN, IrO2, RuO2 and other conducting oxides such as tin oxide (SnO2), indium tin oxide, and related mixtures and alloys. Copper may be deposited on top of these material systems. Besides the use of copper in interconnects for CMOS devices and gate structures in high dielectric constant materials, there may be number of emerging applications such as ferroelectric random access memory devices (FeRAM), tunneling magnetoresistance (TMR) or giant magnetoresistance (GMR) devices where copper is deposited on a metal or a dielectric structure. In a FeRAM, copper may be used as the interconnecting metal or as sandwich metal layer on a gate electrode system. In a TMR or a GMR device, copper can be used as a back terminal, front end terminal or an electrode on a multilayer magnetic/non-magnetic structure. To create these specific structures it is also essential to remove copper selectively from the surface, but not remove the underlying dielectric or metallic material. Other examples of possible uses of copper may lie in the integration of MRAM (magnetic random access memory) devices for non-volatile storage.
In the future, copper may be replaced by silver. Silver has higher electrical conductivity as compared to copper, and should provide comparable electromigration resistance which makes it ideal for interconnect and related applications. The electromigration capability of silver has been shown to improve significantly when the silver layer is encapsulated with a thin film.
FIG. 1 shows a schematic view of the steps in a copper damascene CMP process. A low dielectric constant material disposed on a silicon wafer is patterned by suitable etching to form a plurality of trenches 110 as shown in FIG. 1(a). A diffusion barrier layer 120, such as Ti, Ta or TaN, is then applied to cover the wafer surface, including the trenches 110 as shown in FIG. 1(b). A copper or copper alloy layer 130 is then deposited, by a method such as electroplating. (FIG. 1(c)). The copper or copper alloy layer is isolated from the remainder of the circuit by the barrier layer 120. Copper disposed over dielectric plateaus is commonly referred to as overburden metal 131.
A CMP process can then be used to define the copper layer through an essentially planar removal process. The CMP process proceeds to remove the copper layer sufficient to remove the overburden portion 131 to expose the barrier layer in the overburden regions 131 to produce the structure 140 which is shown in FIG. 1(d). A second CMP step, generally using a different slurry solution as compared to the copper CMP process, is then used to polish the barrier layer and produce the completed structure 150 which is shown in FIG. 1(e). This process can be repeated to produce multiple copper or other conductor levels to form a plurality of interconnect or other levels.
FIG. 2 shows a schematic view of a CMOS transistor 200 having a metal gate formed from a damascene/CMP process. Transistor 200 is shown following CMP polishing of a gate metal, such as Cu, Pt, Os, Ir, IrO2, Ru, RuO2 or Ta, using a damascene/CMP process analogous to the copper interconnect process discussed above. Transistor 200 includes silicon substrate 201, the transistor having a source 202 and a drain 203. The source 202 and drain 203 have lightly doped extensions made possible in previous processing by spacer 204 and 205. A gate aperture is provided in field oxide 208 to reach the silicon substrate 201. A thin gate oxide 218 is disposed on top of silicon substrate 201. Barrier layer 212 is then disposed over gate oxide 218 and on the sidewalls of the gate aperture provided by spacers 204 and 205. Gate metal 215 fills the gate aperture volume and is disposed over barrier layer 212.
Whether an interconnect or a gate electrode is formed using CMP, it is important to stop the CMP process soon after the metal layer is fully removed to minimize removal of underlying layers. Since metal thickness and polishing rates can be non-uniform across the wafer area, it is also helpful for the CMP process to provide a low polishing rate of the underlying layers below the metal relative to the metal removal rate.
A diagram of a conventional CMP polisher 300 is shown in FIG. 3. The CMP polisher includes a polishing pad 310 disposed on a platen 320 which rotates. A wafer 330 is pressed into direct contact with the polishing pad by a force exerting structure 350. A slurry solution is provided by a slurry feed 340 to wet the polishing pad 310 which chemically and physically interacts with the surface of the wafer 330.
Conventional slurries used for the CMP of copper include a solid abrasive and an oxidizing substance. Typically, CMP polishing slurries contain a plurality of alumina or silica particles suspended in an oxidizing aqueous medium. In the case of copper CMP, a wafer containing a copper or a copper alloy surface is mechanically rubbed by a polymeric pad. In FIG. 3, the polishing pad 310 is attached to the bottom of the rotating platen 320, while the wafer 330 is brought in contact with the pad 310 from the top. The wafer 330 can either be rotated or kept stationary. The wafer 330 can be moved in a circular, elliptical or in a linear manner with respect to the polishing pad 310. The pressure on the wafer 330 is generally varied from 0.1 psi to 10 psi, and the rotation speed of the platen 320 is generally varied from 0 rpm to 300 rpm.
The polymeric pad 310 supplies the mechanical component for the polishing process. The harder the polymeric pad 310, the higher the localized shear stress on the surface of the wafer. However the contact area on the surface will decrease when a harder pad is employed in the process. Typical pads which are commonly used include IC1000 CMP pads manufactured by Rodel Corporation, located in Newark, Del.
The diameter of the platen wheels can vary from 6 to 45 inches, while the size of the wafer can vary from 1 to 12 inches in diameter. In general, larger platen wheels produce more uniform polishing results. To maintain a fixed linear velocity, either the angular velocity can be increased or the radius of the wafer from the center can be increased. It is generally important to generate a linear movement of the pad across the wafer.
The copper polishing rate is known to increase with increasing pressure and velocity. However, high pressure and velocity can also increase the size and density of scratches induced by the CMP process.
The polishing solution can be fed directly near the surface of the wafer or can be fed to the polishing area from the underside of the platen. It is important to ensure that the distribution of the slurry is uniform across the wafer. The surface of the wafer should be also be as flat as possible.
To ensure that the underlying layers are not substantially removed in the CMP process, the rate of removal of the copper (or other metal) layer with respect to the underlying dielectric layer should be very high. The underlying dielectric layer is generally a silicon dioxide or a low dielectric constant layer which provides a dielectric constant less than 4.0. This ratio of polishing rates is called selectivity and depends primarily on the composition of the slurry.
Also, due to initial non-uniformities on the wafer surface, the overburden metal will be completely polished off at different times at different locations on the wafer. High slurry selectivity allows copper on all locations on the wafer to be completely removed with no residuals of copper remaining, and without significantly removing the underlayer material.
It is also important for the CMP process to keep the surface defectivity of the copper and other layers as low as possible. Surface defectivity includes scratches, surface roughness and adhering particles on the wafer surface.
The oxidizing substance included in the slurry is typically hydrogen peroxide. Oxidizing substances form a thin abradable copper oxide (Cu2O) layer that is removed by the abrasive particles in the slurry by action of the polishing pad. The sizes of the alumina and silica abrasive particles typically range from 50 nm to 500 nm. U.S. Pat. Nos. 6,063,306, 5,954,997 and 6,126,853 to Kaufmann, et. al., describe the use of specific slurries which contain abrasives such as silica/alumina, hydrogen peroxide based oxidizer, and other complexing and softening agents such as organic amino acids to polish copper and copper/tantalum based structures. When copper interconnects and plugs are formed by CMP using conventional slurries based on abrasives, several problems generally result. Surface morphology inhomogenities such as dishing and erosion can result from copper CMP. Dishing occurs when the surface of the central part of the metal interconnection inlaid in the groove formed in the insulating film is polished excessively compared to the edge. This effect is typically exacerbated for large features, such as 50 xcexcm or greater metal lines and pitches of metal and dielectric layers in damascene technology.
Erosion occurs primarily in thin line structures when both the dielectric and copper are removed. Erosion typically occurs when the rates of the removal of the two adjacent layers are different. The use of hard abrasives such as alumina and silica further exacerbates this problem. Conventional slurries based on abrasive particles typically suffer from both of these problems.
Use of an oxidizer such as hydrogen peroxide in a copper CMP slurry forms a thin copper oxide (Cu2O; known as cuprite) layer on the copper or copper alloy surface. Copper oxide is an oxide whose hardness on the Mohs scale is greater than copper. The Mohs scale is a hardness scale having a range from 1 to 10, with 10 being the hardest material (diamonds). Cuprite has a Mohs hardness of 3.5 to 4, while the underlying copper layer has a Mohs hardness of from 2.5 to 3. Under certain conditions, copper 11 oxide (CuO), (also known as tenorite) may be formed instead of, or in addition to CU2O. CuO also has a hardness of 3.0 to 4. Thus, both CuO and Cu2O have a hardness greater than copper.
The hardness of the respective materials in thin film form can be measured accurately by using nano-indentation measurements. Examples of nano-indentation measurements equipment include Nanoindentor instruments provided by Hysitron Inc., located in Minneapolis, Minn.
To remove the cuprite or a copper (II) oxide layer, abrasive particles, such as alumina (Mohs hardness of 8.5) are provided in the slurry. Abrasives generally have a greater hardness than insulating layers such as silicon dioxide (Mohs hardness of approximately 5 to 7), and thus can cause scratching of the insulating layer. Scratches can decrease circuit yield and also degrade circuit reliability.
The stress between the abrasive and wafer contact can be quite high because of the hardness of the abrasive particles used. The stresses can cause delamination of copper or its underlying barrier layer (e.g. tantalum) from silicon dioxide or other low dielectric constant layers.
Hard abrasives used for polishing copper generally do not allow adequate stopping of the polishing process once the copper overburden layer has been removed. Typically, underneath the copper layer is a barrier layer of tantalum, tantalum nitride, titanium nitride or tungsten nitride. Since the typical alumina abrasive used in copper polishing is relatively harder than the barrier layer, it can also partially remove the protective barrier layer. Thus, the use of hard abrasives such as silica, alumina, zirconia and ceria whose hardness is greater than the hardness of copper, are not suitable for an optimized CMP of copper.
The polishing rate across the surface of the copper is also generally uneven. Thus, finite polishing of the underlying layer results in non-planarity of the surface because at some places on the wafer a part of the underlying barrier layer or the dielectric is removed. This non-planarity can be further exacerbated by the formation of a thick copper oxide layer because of the differences in the initial surface profile of copper, and also the microstructural variations in copper layer.
Static etching of copper, which is chemical etching without mechanical assistance from the polishing pad, can also cause problems in certain slurries. To soften the effect of abrasives, approaches have been developed which reduce the amount of particle loading in the polishing slurry. To compensate for the reduced mechanical removal rate due to less particles, these slurries generally contain chemical additives that can etch the surface of the copper. The static copper etching rate can be quite high. In a typical CMP operation, the static etch rate should be less than 2 to 5% of the CMP polishing rate, or approximately 5 to 20 nm/min.
However, if a slurry solution includes a high concentration of etchants, the static etch rate can be higher than noted above. High static etch rates can result in the undesirable formation of substantially non-planar surfaces since static etching results in isotropic material removal.
The problems noted above occur because of the presence of hard abrasive particles which can scratch or dent the surface of softer materials, such as copper or soft insulating materials, such as SiO2 or other low dielectric constant (low K) materials. A low K dielectric material can be defined as a material which has a dielectric constant less than silicon dioxide (4.0).
The quality of CMP polishing processes for copper could be enhanced by reducing the concentration of the abrasive. For example, it may be possible to polish the surface of copper with a slurry having etchants along with a low concentration of abrasive particles. However, this method cannot generally provide the necessary planarization and anisotropic removal of material.
An alternative method involves forming a passive surface layer such as copper oxide, which can be etched by a solution while mechanically rubbing with a pad. However, copper oxides, such as Cu2O and CuO are materials which are significantly harder than copper or most insulating layers. As a result, hard particles generally are required to remove copper oxide which can damage or peel the softer exposed or adjacent layers and typical produce significant surface non-uniformities.
Slurry additives, such as those disclosed in EP 0913442A2 to Hitachi Chemicals, can be used to soften the surface copper oxide layer to facilitate removal by mechanically aided etching also presents problems. First, this is equivalent to etching of the copper surface in which the copper species is removed in a dissolved form. This process can lead to high static removal rate of copper ( greater than 5%), a problem which should generally be avoided.
Moreover, if the etching rate is decreased, the removal rate of copper is reduced. The mechanical action serves to enhance the etching rate by removal of surface passivating layer from the surface. If the etching chemicals are reduced, the polishing rates becomes sub-optimal. In the etching of the surface oxide layer, the etching rate is dependent on the transport of the chemicals, thus may lead to non-uniformities at the surface, which is also undesirable. Thus, copper CMP through the formation, softening and etching/removal of a copper oxide layer, including variants thereof, do not represent an ideal solution for copper removal.
A slurry for chemical-mechanical polishing (CMP) of a copper or silver containing film provides at least one reagent for reacting with the film to form a soft layer on the surface of the copper or silver film. The soft layer has a hardness less than the copper or silver film. In conventional copper CMP, cuprite (CU2O) and/or copper II oxide (CuO) are formed on the copper surface. Cuprite or copper II oxide have a hardness greater than that of copper.
The soft layer can be a copper or silver halide, such as copper iodide (CuI) or silver iodide (AgI). A plurality of particles can be added to the slurry. The particles are preferably softer than the copper film and can be selected from polymers and nano-porous particles. For example, soft particles can be polystyrene, polytetrafluoroethylene, polyamide, silver or porous silica particles.
Particles can also be abrasive particles, having a hardness greater than that of copper, provided they are provided in a sufficiently low concentration, preferably being less than 1 wt. %. Abrasive particles can be silica, alumina, zirconia, carbon or yttria particles.
The slurry can include iodine, bromine, fluorine, HI, KIO3, sulfuric acid, hydrochloric acid or carbonic acid to provide desired reagents for formation of the soft layer. Reactants may be formed either directly or indirectly using appropriate chemicals.
The soft layer can be copper bromide, copper fluoride, copper chloride, copper carbonate, copper sulfate or copper nitrate or any of these layers mixed with an oxide layer. The thickness of the soft layer is preferably less than about 1 xcexcm, and most preferably less than about 0.2 xcexcm. The soft layer is preferably substantially insoluble in the slurry. As used herein, substantially insoluble refers to a chemical etch rate of less than 20 nm/min.
The pH of the slurry can be from 2 to 12. Preferably, The pH of the slurry is from 2 to 9.
The slurry can include an etchant for removing a copper oxide or carbon containing film disposed on or in the copper film. The etchant can be an acid. The acid can be nitric acid, acetic acid, sulfuric acid, hydroxy acid, hydrochloric acid, hydrofluoric acid, carboxylic acid, citric acid, malic acid, malonic acid, succinic acid, phtalic acid, tartaric acid, dihydroxysuccinic acid, lactic acid, malic acid, fumaric acid, adipic acid, glutaric acid, oxalic acid, benzoic acid, propionic acid, butyric acid, ethylenediamminetetraacetate ion (EDTA) or valeric acid.
In an alternate embodiment of the invention, a chemical etching step using etchants such as those listed above can be used before initiating CMP. The chemical etching step can remove contamination on the copper or silver surface such as xe2x80x9cnative oxidexe2x80x9d, prior to initiating polishing.
The slurry can include a passivating additive. The passivating additive can be benzotriazole (BTA) or tolytriazole (TTA). The concentration of the passivating additive can be from 0.0001 mM to 300 mM.
The slurry can include at least one salt. The salt can be KI, KBr, KCO3, KCl, NH4I or NH4Cl.
To modify the reaction rate kinetics on the surface, chelating agents may be used. Examples of some chelating agents include EDTA, and bidentate ligands such as ethylenediammine (en), acteylacetonate ion (acac), phenanthroline (phen), andoxalates and related compounds.
The selectivity of the CMP process using the slurry can be at least 100, or at least 200 for removal of a copper or silver film relative to a tantalum, titanium or other refractory metal based barrier layer and at least 50, at least 80,at least 100, or at least 200 for the removal of the copper or silver film relative to a silicon dioxide, alumina or low K dielectric layer. Preferably, the metal (e.g. Cu/Ta or Ag/Ta and Cu or Ag) film selectivities relative to a silicon dioxide (or other low K dielectric) layer are each at least 500.
The slurry may include at least one surfactant. The surfactant can be a non-ionic, anioninic, cationic or zwitterionic surfactant. The surfactant may also be amphoteric.
The slurry may contain one or more polymer additives. For example, polyethylene oxide (PEO), polyacrylic acid (PAA), polyacryamide (PAM), polyvinylalcohol (PVA), polyalkylamine (PAH) may be used.
A method for chemical mechanical polishing (CMP) of a copper containing film includes the steps of providing a slurry which reacts with the copper film to form a soft layer on a surface of the copper film. The soft layer has a hardness less than the copper film. The slurry solution is applied to the copper film to form the soft layer. The soft layer is removed using a polishing pad. The removing step preferably applies a nominal shear force greater than an interface strength of an interface between the soft layer formed and the copper or silver film. The nominal shear stress can be greater than about 0.1 psi, greater than about 0.5 psi or greater than about 1.0 psi.